Research Group on Computer-Aided Engineering of Circuits and Systems (CAECAS)

[6]     F. E. Rangel-Patiño, J. E. Rayas-Sánchez, E. A. Vega-Ochoa, and N. Hakim, “Direct optimization of a PCI Express link equalization in industrial post-silicon validation,” in IEEE Latin American Test Symp.  (LATS 2018), Sao Paulo, Brazil, Mar. 2018.

[5]     F. Leal-Romo, M. Cabrera-Gómez, J. E. Rayas-Sánchez, and D. M. García-Mora, “Design optimization of a planar spiral inductor using space mapping,” in Int. Conf. Electrical Performance of Electronic Packaging and Systems (EPEPS 2017), San Jose, CA, Oct. 2017.

[4]     A. Corres-Matamoros, E. Martínez-Guerrero, and J. E. Rayas-Sánchez, “Design and validation of a portable radio-frequency diathermy prototype,” in Int. Caribbean Conf. Devices, Circuits, and Systems (ICCDCS-2017), Cozumel, Mexico, Jun. 2017.

[3]     J. R. del-Rey, Z. Brito-Brito, J. E. Rayas-Sánchez, and N. Izquierdo, “Temperature effects in automotive-grade high speed interconnects,” in IEEE MTT-S Latin America Microwave Conf. (LAMC-2016), Puerto Vallarta, Mexico, Dec. 2016.

[2]     L. M. Aguilar-Lobo, A. Garcia-Osorio, J. R. Loo-Yau, S. Ortega-Cisneros, P. Moreno, J. E. Rayas-Sánchez, and J. A. Reynoso-Hernández, “A digital predistortion technique based on a NARX network to linearize GaN class F power amplifiers,” in IEEE Int. Midwest Symp. Circuits Syst., College Station, TX, Aug. 2014.

[1]     J. E. Rayas-Sánchez, F. Lara-Rojo and E. Martínez-Guerrero, “A linear inverse space mapping algorithm for microwave design in the frequency and transient domains,” in IEEE MTT-S Int. Microwave Symp. Dig., Fort Worth, TX, Jun. 2004.