Research Group on Computer-Aided Engineering of Circuits and Systems (CAECAS)

[29]   J. E. Rayas-Sánchez and G. Chattopadhyay, “Promoting and empowering the RF and microwave community in Costa Rica,” IEEE Microwave Magazine, vol. 24, no. 12, pp. 98-101, Dec. 2023.

[28]   J. E. Rayas-Sánchez and J. A. Reynoso-Hernández, “An overview on RF and microwave research in Latin America: scanning Latin American research on microwaves,” IEEE Microwave Magazine, vol. 24, no. 5, pp. 45-57, May 2023.

[27]   J. W. Bandler and J. E. Rayas-Sánchez, “An early history of optimization technology for automated design of microwave circuits,” IEEE J. of Microwaves, vol. 3, no. 1, pp. 319-337, Jan. 2023.

[26]   G. P. Gibiino, J. E. Rayas-Sánchez, J. B. King, M. Pirola, R. Khazaka, Q. J. Zhang, D. E. Root, and J. W. Bandler, “TC-2 Design Automation Committee—On the future of RF and microwave design automation—2022,” IEEE Microwave Magazine, vol. 23, no. 11, pp. 104-105, Nov. 2022.

[25]   W. Che, R. Mansour, X. Gong, and J. Rayas-Sánchez, “The MTT-S Education Committee–Promoting education for all–2022,” IEEE Microwave Magazine, vol. 23, no. 11, pp. 84-86, Nov. 2022.

[24]   A. E. Moreno-Mojica and J. E. Rayas-Sánchez, “Frequency- and time-domain yield optimization of a power delivery network subject to large decoupling capacitor tolerances,” IEEE Trans. Computer-Aided Design of Integrated Circuits and Systems, vol. 41, no. 12, pp. 5610-5620, Dec. 2022.

[23]   A. Viveros-Wacher, R. Baca-Baylón, F. E. Rangel-Patiño, J. L. Silva-Cortés, E. A. Vega-Ochoa, and J. E. Rayas-Sánchez, “Fast jitter tolerance testing for high-speed serial links in post-silicon validation,” IEEE Trans. Electromagnetic Compatibility, vol. 64, no. 2, pp. 516-523, Apr. 2022.

[22]   J. E. Rayas-Sánchez, S. Koziel, and J. W. Bandler, “Advanced RF and microwave design optimization: a journey and a vision of future trends,” IEEE J. of Microwaves, vol. 1, no. 1, pp. 481-493, Jan. 2021.

[21]   F. J. Leal-Romo, J. E. Rayas-Sánchez, and J. L. Chávez-Hurtado, “Surrogate-based analysis and design optimization of power delivery networks,” IEEE Trans. Electromagnetic Compatibility, vol. 62, no. 6, pp. 2528-2537, Dec. 2020.

[20]   G. Rafael-Valdivia and J. E. Rayas-Sánchez, “The second IEEE MTT-S Latin America microwave conference [Conference Report],” IEEE Microwave Magazine, vol. 21, no. 1, pp. 114-118, Jan. 2020.

[19]   A. Viveros-Wacher, J. E. Rayas-Sánchez, and Z. Brito-Brito, “Analog gross fault identification in RF circuits using neural models and constrained parameter extraction,” IEEE Trans. Microwave Theory Techn., vol. 67, no. 6, pp. 2143-2150, Jun. 2019.

[18]   I. Lomelí-Illescas, S. A. Solis-Bustos, and J. E. Rayas-Sánchez, “A tool for the automatic generation and analysis of regular analog layout modules,” Elsevier Integration - the VLSI Journal, vol. 65, pp. 81-87, Mar. 2019. (published online: 30 Nov. 2018).

[17]   F. E. Rangel-Patiño, J. E. Rayas-Sánchez, A. Viveros-Wacher, J. L. Chávez-Hurtado, E. A. Vega-Ochoa, and N. Hakim, “Post-silicon receiver equalization metamodeling by artificial neural networks,” IEEE Trans. Computer-Aided Design of Integrated Circuits and Systems, vol. 38, no. 4, pp. 733-740, Apr. 2019. (published online: 8 May 2018).

[16]   F. E. Rangel-Patiño, A. Viveros-Wacher, J. E. Rayas-Sánchez, I. Durón-Rosales, E. A. Vega-Ochoa, N. Hakim and E. López-Miralrio, “A holistic formulation for system margining and jitter tolerance optimization in industrial post-silicon validation,” IEEE Trans. Emerging Topics Computing, vol. 8, no. 2, pp. 453-463, Apr.-Jun. 2020. (published online: 29 Sep. 2017).

[15]   J. E. Rayas-Sánchez and G. E. Ponchak, “The first IEEE MTT-S Latin America microwave conference [Conference Report],” IEEE Microwave Magazine, vol. 18, no. 6, pp. 128-131, Sep.-Oct. 2017.

[14]   F. E. Rangel-Patiño, J. L. Chávez-Hurtado, A. Viveros-Wacher, J. E. Rayas-Sánchez, and N. Hakim, “System margining surrogate-based optimization in post-silicon validation,” IEEE Trans. Microwave Theory Techn., vol. 65, no. 9, pp. 3109-3115, Sep. 2017.

[13]   J. L. Chavez-Hurtado and J. E. Rayas-Sánchez, “Polynomial-based surrogate modeling of RF and microwave circuits in frequency domain exploiting the multinomial theorem,” IEEE Trans. Microwave Theory Techn., vol. 64, no. 12, pp. 4371-4381, Dec. 2016.

[12]   J. E. Rayas-Sanchez, “Power in simplicity with ASM: tracing the aggressive space mapping algorithm over two decades of development and engineering applications,” IEEE Microwave Magazine, vol. 17, no. 4, pp. 64-76, Apr. 2016.

[11]   J. C. Cervantes-González, J. E. Rayas-Sánchez, C. A. López, J. R. Camacho-Pérez, Z. Brito-Brito, and J. L. Chavez-Hurtado, “Space mapping optimization of handset antennas considering EM effects of mobile phone components and human body,” Int. J. RF and Microwave CAE, vol. 26, no. 2, pp. 121-128, Feb. 2016.

[10]   J. E. Rayas-Sánchez, J. L. Chavez-Hurtado, and Z. Brito-Brito, “Design optimization of full-wave EM models by low-order low-dimension polynomial surrogate functionals,” Int. J. Numerical Modelling: Electron. Networks, Dev. Fields, vol. 30, no. 3-4, e2094, May-Aug. 2017. (Published online: 13 Sep. 2015).

[9]     L. M. Aguilar-Lobo, J. R. Loo-Yau, J. E. Rayas-Sánchez, S. Ortega-Cisneros, P. Moreno, and J. A. Reynoso-Hernández, “Application of the NARX neural network as a digital predistortion technique for linearizing microwave power amplifiers,” Microwave and Optical Technology Letters, vol. 57, no. 9, pp. 2137-2142, Sep. 2015.

[8]     J. E. Rayas-Sánchez, D. Pasquet, B. Szendrenyi, and M. S. Gupta, “MTT-S Mexico trip: addressing the RF and microwave community in Mexico,” IEEE Microwave Magazine, vol. 16, pp. 104-107, Aug. 2015.

[7]     R. Murphy, R. Torres, J. E. Rayas-Sánchez, A. Reynoso, M. Maya-Sánchez, A. Henze, A. Zozaya, P. del Pino, J. Pena, and G. Rafael-Valdivia, “R&D in Latin America: RF and microwave research in Latin America,” IEEE Microwave Magazine, vol. 15, pp. 97-103, May 2014.

[6]     V. Gutiérrez-Ayala and J. E. Rayas-Sánchez, “Neural input space mapping optimization based on nonlinear two-layer perceptrons with optimized nonlinearity,” Int. J. RF and Microwave CAE, vol. 20, pp. 512-526, Sep. 2010.

[5]     Q. S. Cheng, J. W. Bandler and J. E. Rayas-Sánchez, “Tuning-aided implicit space mapping,” Int. J. RF and Microwave CAE, vol. 18, pp. 445-453, Sep. 2008.

[4]     J. E. Rayas-Sánchez and V. Gutiérrez-Ayala, “EM-based Monte Carlo analysis and yield prediction of microwave circuits using linear-input neural-output space mapping,” IEEE Trans. Microwave Theory Tech., vol. 54, pp. 4528-4537, Dec. 2006.

[3]     J. E. Rayas-Sánchez, F. Lara-Rojo and E. Martínez-Guerrero, “A linear inverse space mapping (LISM) algorithm to design linear and nonlinear RF and microwave circuits,” IEEE Trans. Microwave Theory Tech., vol. 53, pp. 960-968, March 2005.

[2]     J. E. Rayas-Sánchez, “A frequency-domain approach to interconnect crosstalk simulation and minimization,” Elsevier Microelectronics Reliability, vol. 44, pp. 673-681, Apr. 2004.

[1]     J. E. Rayas-Sánchez, “EM-based optimization of microwave circuits using artificial neural networks: the state of the art,” IEEE Trans. Microwave Theory Tech., vol. 52, pp. 420-435, Jan. 2004.